In Cirq document that describes 'best practices' for manually optimizing circuits, they recommend to construct a circuit in a pattern that alternate 'single-qubit gates with two-qubit gates in each layer'.
Regarding this, I have few questions:
(1) The reason for such recommendation, appeared in the document, is because they calibrated devices optimally to such pattern. Yet, why such specific pattern must have been considered as calibration object?
(2) Will there be any other patterns in circuit layers to be considered for optimal circuit runs?
