Is it possible, given a declarative description of an architecture's register layout and instruction semantics and machine code encodings, to autogenerate a compiler back-end?
If so, has anyone ever done this?
Is it possible, given a declarative description of an architecture's register layout and instruction semantics and machine code encodings, to autogenerate a compiler back-end?
If so, has anyone ever done this?
I think this goes a bit farther than you asked for, because they're actually looking for good code sequences. For something a little more basic you could go back to some of Norm Ramsey's earlier work, like: Norman Ramsey; Mary F. Fernández: "Specifying Representations of Machine Instructions", ACM T. Prog. Lang. and Sys., 19(3):492–524, May 1997.
There's a long line of research on trying to automatically generate back ends from simpler descriptions. Look for papers by Christopher W Fraser, David R Hanson and Todd A Proebsting.